The present invention relates in general to a local interconnect, and, more particularly, to a low resistance local interconnect having a refractory metal silicide, and a process of making the same.
In the manufacture of integrated circuits used in the construction of dynamic random access memories (DRAMs), static random access memories (SRAMs), and the like, interconnects are required to provide the necessary electrical paths between field effect transistors and other devices fabricated on the semiconductor substrate and the external circuitry used to pass data to and from these devices. Polycide structures are commonly used to form the gate of a metal oxide semiconductor field effect transistor (MOSFET). Polycide structures are especially attractive for self-aligned gates. A polycide structure is formed by depositing a layer of doped polysilicon over the gate insulation layer. The polysilicon is then etched to define the gate electrode. A refractory metal, such as titanium, is then formed over the remaining polysilicon and silicon substrate. A metal silicide is formed by annealing the polysilicon and the refractory metal with the polysilicon supplying the source of silicon for the silicide. The unreacted refractory metal is etched, with the remaining polysilicon and metal silicide forming the polycide gate.
A local interconnect is typically used to connect the polycide gate to certain active semiconductor areas, such as the drain or source of another MOSFET. A local interconnect may also be used to connect active semiconductor areas to other active semiconductor areas which are separated by an insulating region, such as a field oxide region. Titanium silicide (TiSi.sub.2) is commonly used as a local interconnect for connecting desired polycide gates and active semiconductor areas. TiSi.sub.2 may be formed through physical vapor deposition (PVD) or chemical vapor deposition (CVD). PVD entails sputtering titanium followed by a layer of silicon. The titanium and silicon are reacted to form TiSi.sub.2. Silicon from the underlying areas also reacts with the titanium to form TiSi.sub.2. CVD typically entails reacting titanium tetrachloride (TiCl.sub.4) and silane (SiH.sub.4) in the gas phase to form TiSi.sub.2. Silicon from the underlying areas is also consumed in the CVD reaction to form TiSi.sub.2.
While TiSi.sub.2 is a relatively low resistive conductor, the titanium is susceptible to oxidation during and after its formation. The resultant titanium dioxide (TiO.sub.2) increases the sheet resistance of the interconnect thereby increasing power dissipation and reducing the speed of the device. As used herein, sheet resistance is an electrical quantity measured on a thin layer and has the units of ohms/square. Further, a layer of TiO.sub.2 makes it difficult to form good electrical contacts on the TiSi.sub.2 interconnect and poses adhesion problems when subsequent layers are deposited on top of the interconnect line. Further, TiSi.sub.2 is susceptible to damage during subsequent contact formation as the typical contact etch also consumes TiSi.sub.2. Typically, the size of the interconnect must be increased in order to compensate for damage caused by the contact etch.
Accordingly, there is a need for a local interconnect having a lower resistance and one in which the effects of oxidation are reduced. Preferably, the local interconnect is smaller in width and thickness. There is also a need for a method of forming such a local interconnect. Preferably, such a method would be inexpensive, easy to implement and would not entail excess processing steps.